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/****************************************************************************** |
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* Top contributors (to current version): |
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* Martin Brain, Aina Niemetz |
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* |
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* This file is part of the cvc5 project. |
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* |
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* Copyright (c) 2009-2021 by the authors listed in the file AUTHORS |
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* in the top-level source directory and their institutional affiliations. |
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* All rights reserved. See the file COPYING in the top-level source |
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* directory for licensing information. |
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* **************************************************************************** |
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* |
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* SymFPU glue code for floating-point values. |
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*/ |
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#include "util/floatingpoint_literal_symfpu_traits.h" |
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#include "base/check.h" |
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namespace cvc5 { |
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namespace symfpuLiteral { |
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template <bool isSigned> |
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287642 |
wrappedBitVector<isSigned> wrappedBitVector<isSigned>::one( |
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const Cvc5BitWidth& w) |
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{ |
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return wrappedBitVector<isSigned>(w, 1); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::zero( |
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const Cvc5BitWidth& w) |
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{ |
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return wrappedBitVector<isSigned>(w, 0); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::allOnes( |
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const Cvc5BitWidth& w) |
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{ |
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return ~wrappedBitVector<isSigned>::zero(w); |
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} |
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template <bool isSigned> |
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Cvc5Prop wrappedBitVector<isSigned>::isAllOnes() const |
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{ |
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return (*this == wrappedBitVector<isSigned>::allOnes(getWidth())); |
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} |
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template <bool isSigned> |
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Cvc5Prop wrappedBitVector<isSigned>::isAllZeros() const |
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{ |
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return (*this == wrappedBitVector<isSigned>::zero(getWidth())); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::maxValue( |
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const Cvc5BitWidth& w) |
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{ |
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if (isSigned) |
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{ |
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BitVector base(w - 1, 0U); |
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return wrappedBitVector<true>((~base).zeroExtend(1)); |
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} |
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else |
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{ |
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return wrappedBitVector<false>::allOnes(w); |
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} |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::minValue( |
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const Cvc5BitWidth& w) |
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{ |
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if (isSigned) |
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{ |
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BitVector base(w, 1U); |
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BitVector shiftAmount(w, w - 1); |
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BitVector result(base.leftShift(shiftAmount)); |
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return wrappedBitVector<true>(result); |
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} |
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else |
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{ |
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return wrappedBitVector<false>::zero(w); |
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} |
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} |
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/*** Operators ***/ |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator<<( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::leftShift(op); |
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} |
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template <> |
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wrappedBitVector<true> wrappedBitVector<true>::operator>>( |
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const wrappedBitVector<true>& op) const |
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{ |
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return BitVector::arithRightShift(op); |
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} |
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template <> |
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wrappedBitVector<false> wrappedBitVector<false>::operator>>( |
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const wrappedBitVector<false>& op) const |
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{ |
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return BitVector::logicalRightShift(op); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator|( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::operator|(op); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator&( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::operator&(op); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator+( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::operator+(op); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator-( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::operator-(op); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator*( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::operator*(op); |
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} |
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template <> |
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wrappedBitVector<false> wrappedBitVector<false>::operator/( |
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const wrappedBitVector<false>& op) const |
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{ |
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return BitVector::unsignedDivTotal(op); |
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} |
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template <> |
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wrappedBitVector<false> wrappedBitVector<false>::operator%( |
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const wrappedBitVector<false>& op) const |
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{ |
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return BitVector::unsignedRemTotal(op); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator-(void) const |
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{ |
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return BitVector::operator-(); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::operator~(void) const |
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{ |
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return BitVector::operator~(); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::increment() const |
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{ |
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return *this + wrappedBitVector<isSigned>::one(getWidth()); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::decrement() const |
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{ |
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return *this - wrappedBitVector<isSigned>::one(getWidth()); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::signExtendRightShift( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::arithRightShift(BitVector(getWidth(), op)); |
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} |
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/*** Modular opertaions ***/ |
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// No overflow checking so these are the same as other operations |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::modularLeftShift( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return *this << op; |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::modularRightShift( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return *this >> op; |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::modularIncrement() const |
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{ |
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return increment(); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::modularDecrement() const |
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{ |
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return decrement(); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::modularAdd( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return *this + op; |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::modularNegate() const |
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{ |
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return -(*this); |
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} |
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/*** Comparisons ***/ |
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template <bool isSigned> |
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Cvc5Prop wrappedBitVector<isSigned>::operator==( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::operator==(op); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<true>::operator<=( |
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const wrappedBitVector<true>& op) const |
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{ |
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return signedLessThanEq(op); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<true>::operator>=( |
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const wrappedBitVector<true>& op) const |
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{ |
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return !(signedLessThan(op)); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<true>::operator<( |
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const wrappedBitVector<true>& op) const |
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{ |
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return signedLessThan(op); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<true>::operator>( |
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const wrappedBitVector<true>& op) const |
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{ |
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return !(signedLessThanEq(op)); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<false>::operator<=( |
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const wrappedBitVector<false>& op) const |
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{ |
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return unsignedLessThanEq(op); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<false>::operator>=( |
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const wrappedBitVector<false>& op) const |
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{ |
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return !(unsignedLessThan(op)); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<false>::operator<( |
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const wrappedBitVector<false>& op) const |
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{ |
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return unsignedLessThan(op); |
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} |
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template <> |
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Cvc5Prop wrappedBitVector<false>::operator>( |
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const wrappedBitVector<false>& op) const |
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{ |
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return !(unsignedLessThanEq(op)); |
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} |
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/*** Type conversion ***/ |
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// Node makes no distinction between signed and unsigned, thus ... |
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template <bool isSigned> |
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wrappedBitVector<true> wrappedBitVector<isSigned>::toSigned(void) const |
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{ |
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return wrappedBitVector<true>(*this); |
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} |
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template <bool isSigned> |
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wrappedBitVector<false> wrappedBitVector<isSigned>::toUnsigned(void) const |
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{ |
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return wrappedBitVector<false>(*this); |
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} |
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/*** Bit hacks ***/ |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::extend( |
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Cvc5BitWidth extension) const |
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{ |
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if (isSigned) |
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{ |
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return BitVector::signExtend(extension); |
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} |
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else |
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{ |
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return BitVector::zeroExtend(extension); |
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} |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::contract( |
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Cvc5BitWidth reduction) const |
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{ |
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Assert(getWidth() > reduction); |
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return extract((getWidth() - 1) - reduction, 0); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::resize( |
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Cvc5BitWidth newSize) const |
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{ |
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Cvc5BitWidth width = getWidth(); |
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if (newSize > width) |
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{ |
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return extend(newSize - width); |
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} |
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else if (newSize < width) |
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{ |
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return contract(width - newSize); |
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} |
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else |
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{ |
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return *this; |
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} |
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} |
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template <bool isSigned> |
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28941 |
wrappedBitVector<isSigned> wrappedBitVector<isSigned>::matchWidth( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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Assert(getWidth() <= op.getWidth()); |
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return extend(op.getWidth() - getWidth()); |
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} |
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template <bool isSigned> |
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wrappedBitVector<isSigned> wrappedBitVector<isSigned>::append( |
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const wrappedBitVector<isSigned>& op) const |
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{ |
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return BitVector::concat(op); |
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} |
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// Inclusive of end points, thus if the same, extracts just one bit |
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template <bool isSigned> |
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50620 |
wrappedBitVector<isSigned> wrappedBitVector<isSigned>::extract( |
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Cvc5BitWidth upper, Cvc5BitWidth lower) const |
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{ |
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Assert(upper >= lower); |
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return BitVector::extract(upper, lower); |
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} |
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// Explicit instantiation |
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template class wrappedBitVector<true>; |
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template class wrappedBitVector<false>; |
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traits::rm traits::RNE(void) |
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{ |
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return RoundingMode::ROUND_NEAREST_TIES_TO_EVEN; |
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}; |
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traits::rm traits::RNA(void) |
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{ |
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return RoundingMode::ROUND_NEAREST_TIES_TO_AWAY; |
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}; |
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traits::rm traits::RTP(void) { return RoundingMode::ROUND_TOWARD_POSITIVE; }; |
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traits::rm traits::RTN(void) { return RoundingMode::ROUND_TOWARD_NEGATIVE; }; |
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traits::rm traits::RTZ(void) { return RoundingMode::ROUND_TOWARD_ZERO; }; |
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// This is a literal back-end so props are actually bools |
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// so these can be handled in the same way as the internal assertions above |
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57252 |
void traits::precondition(const traits::prop& p) |
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{ |
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57252 |
Assert(p); |
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57252 |
return; |
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} |
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12012 |
void traits::postcondition(const traits::prop& p) |
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{ |
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12012 |
Assert(p); |
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12012 |
return; |
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} |
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55931 |
void traits::invariant(const traits::prop& p) |
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{ |
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55931 |
Assert(p); |
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55931 |
return; |
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} |
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} // namespace symfpuLiteral |
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29502 |
} // namespace cvc5 |